A new twin-well CMOS process using nitridized-oxide-LOCOS (NOLOCOS) isolation technology

Author

Hong-Hsiang Tsai ; Yu, Chin-Lin ; Ching-Yuan Wu

Author_Institution

Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu, Taiwan

Volume

10

Issue

7

fYear

1989

fDate

7/1/1989 12:00:00 AM

Firstpage

307

Lastpage

309

Abstract

A twin-well CMOS process using the nitridized pad-oxide film as a buffer for the enhanced local oxidation of silicon (LOCOS) in which the nitridized pad oxide is used to obtain a defect-free and near-zero bird´s beak field isolation structure is discussed. The principal feature of the process is that high-temperature nitridation of the thin pad oxide is simultaneously used to increase the junction depth of the As-implanted n-well. Both n- and p-channel MOSFETs fabricated by the twin-cell CMOS process using the nitridized-oxide-LOCOS (NOLOCOS) isolation technology are characterized and compared to those fabricated by the conventional LOCOS isolation technique. The major features of the NOLOCOS isolation technology in CMOS/VLSI fabrication are clearly demonstrated.<>

Keywords

CMOS integrated circuits; VLSI; integrated circuit technology; ion implantation; As-implanted n-well; CMOS/VLSI fabrication; IC technology; NOLOCOS; Si oxidation; Si:As; Si:B; enhanced local oxidation; high-temperature nitridation; isolation technology; n-channel MOSFET; nitridised pad SiO/sub 2/ buffer layer; nitridized-oxide-LOCOS; p-channel MOSFETs; twin-well CMOS process; Buffer layers; CMOS process; CMOS technology; Fabrication; Implants; Isolation technology; Oxidation; Resists; Semiconductor films; Silicon;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.29661

Filename

29661