AESOP: a simulation-based knowledge system for CMOS process diagnosis

Author

Dishaw, J. Patrick ; Pan, Jeff Y-C

Author_Institution

Center for Integrated Syst., Stanford Univ., CA, USA

Volume

2

Issue

3

fYear

1989

fDate

8/1/1989 12:00:00 AM

Firstpage

94

Lastpage

103

Abstract

The AESOP system is a prototype computer tool designed to provide the automatic analysis and diagnosis of process deviations through electrical measurements on specific test structures. Causal relations necessary for diagnosis were determined through extensive use of numerical simulation for the CMOS process investigated with this prototype. The use of physics-based numerical simulators complements the previous approach of experimental knowledge engineering to determine these relations. Interaction with the user is facilitated in the AESOP system through the use of customized window-based editors and bit-mapped graphics. The abilities and limitations of the AESOP prototype are demonstrated on several sets of end-of-line test data

Keywords

CMOS integrated circuits; digital simulation; integrated circuit manufacture; knowledge based systems; process computer control; semiconductor technology; AESOP; CMOS process diagnosis; abilities; automatic analysis and diagnosis; bit-mapped graphics; causal relations; customized window-based editors; electrical measurements; end-of-line test data; experimental knowledge engineering; limitations; numerical simulation; physics-based numerical simulators; process deviations; prototype computer tool; simulation-based knowledge system; specific test structures; Automatic testing; CMOS process; Computational modeling; Electric variables measurement; Knowledge based systems; Knowledge engineering; Numerical simulation; Prototypes; System testing; Virtual prototyping;

fLanguage

English

Journal_Title

Semiconductor Manufacturing, IEEE Transactions on

Publisher

ieee

ISSN

0894-6507

Type

jour

DOI

10.1109/66.29675

Filename

29675