DocumentCode
111938
Title
An Energy-Recovering Reconfigurable Series Resonant Clocking Scheme for Wide Frequency Operation
Author
Bezzam, Ignatius ; Mathiazhagan, Chakravarthy ; Raja, Tezaswi ; Krishnan, Shoba
Author_Institution
Santa Clara Univ., Santa Clara, CA, USA
Volume
62
Issue
7
fYear
2015
fDate
Jul-15
Firstpage
1766
Lastpage
1775
Abstract
On-chip low skew clock distribution driving large load capacitances can consume as much as 70% of the total dynamic power that is lost as heat, resulting in high cooling costs. To mitigate this, an energy recovering reconfigurable series resonance solution with all the critical support circuitry is described. This LC resonant clock driver on a 22 nm process node saves about 50% driver power ( >40% overall) and has 50% less skew than non-resonant driver at 2 GHz, while operating down to 0.2 GHz for dynamic voltage and frequency scaling. Reconfiguring for pulse mode operation enables further power saving, using latches instead of flip-flop banks, for double data rate applications. Tradeoffs in timing performance versus power, based on theoretical analysis, are compared and verified, to enable synthesis of an optimal topology for a given application.
Keywords
LC circuits; clocks; driver circuits; flip-flops; LC resonant clock driver; double data rate; dynamic voltage; energy-recovering reconfigurable series resonant clocking scheme; flip-flop banks; frequency 2 GHz; frequency scaling; high cooling costs; latches; load capacitances; on-chip low skew clock distribution; pulse mode operation; size 22 nm; wide frequency operation; Capacitance; Clocks; Delays; Inductors; Resonant frequency; Switches; Clocks; dynamic voltage and frequency scaling; high speed integrated circuits; low-power design; resonant drivers; systems-on-chip; timing;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2015.2423797
Filename
7132824
Link To Document