A high-frequency and high-resolution fourth-order ΣΔ A/D converter in BiCMOS technology

Author

Yin, Guangming ; Sansen, Willy

Author_Institution

ESAT-MICAS, Katholieke Univ., Leuven, Heverlee, Belgium

Volume

29

Issue

8

fYear

1994

fDate

8/1/1994 12:00:00 AM

Firstpage

857

Lastpage

865

Abstract

A high-performance cascaded sigma-delta modulator is presented. It has a new three-stage fourth-order topology and provides functionally a maximum signal to quantization noise ratio of 16 bits and 16.5-bit dynamic range with an oversampling ratio of only 32. This modulator is implemented with fully differential switch-capacitor circuits and is manufactured in a 2-μm BiCMOS process. The converter, operated from +/-2.5 V power supply, +/-1.25 V reference voltage and oversampling clock of 48 MHz, achieves 97 dB resolution at a Nyquist conversion rate of 1.5 MHz after comb-filtering decimation. The power consumption of the converter is 180 mW.

Keywords

BiCMOS integrated circuits; analogue-digital conversion; delta modulation; switched capacitor networks; ΣΔ A/D converter; 180 mW; 2 micron; 2.5 V; 48 MHz; BiCMOS technology; HF ADC; cascaded sigma-delta modulator; comb-filtering decimation; differential switch-capacitor circuits; high-frequency operation; high-resolution; oversampling ratio; three-stage fourth-order topology; BiCMOS integrated circuits; Circuit noise; Circuit topology; Delta-sigma modulation; Dynamic range; Manufacturing processes; Power supplies; Quantization; Signal to noise ratio; Switching circuits;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.297688

Filename

297688