A four-channel CMOS codec filter circuit “SICOFI-4”

Author

Tiefenbacher, M. ; Caldera, P. ; Dielacher, F. ; Hauptmann, J. ; Steiner, M.

Author_Institution

Entwicklungszentrum fur Mikroelektronik, Siemens AG, Villach, Austria

Volume

29

Issue

8

fYear

1994

fDate

8/1/1994 12:00:00 AM

Firstpage

906

Lastpage

913

Abstract

Cost reduction by integration of complex mixed analog-digital systems on a single chip and an excellent yield to area ratio is a major goal for IC design in the nineties. In this paper, a four-channel codec-filter chip for analog subscriber lines in ISDN-orientated networks is presented, giving an exceptional example for high level system implementation combined with parallel DSP integration and analog circuitry with high performance. The chip combines four analog frontends, digital signal processing realized by different approaches for a sophisticated filter concept in addition with test strategies including digital and analog BIST. The circuit is fabricated in a standard 1-μm CMOS technology, needs a single 5-V power supply, and can easily be programmed to world-wide different country specifications and applications

Keywords

CMOS integrated circuits; ISDN; built-in self test; codecs; digital filters; integrated circuit testing; mixed analogue-digital integrated circuits; subscriber loops; 1 micron; 5 V; BIST; ISDN-orientated networks; SICOFI-4; analog circuitry; analog frontends; analog subscriber lines; digital signal processing; four-channel CMOS codec filter chip; mixed analog-digital systems; parallel DSP integration; single 5 V power supply; test strategies; Analog integrated circuits; Analog-digital conversion; Analog-digital integrated circuits; Built-in self-test; CMOS technology; Circuit testing; Codecs; Costs; Digital filters; Digital signal processing chips;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.297694

Filename

297694