Title :
Exploiting Gate Leakage in Deep-Submicrometer CMOS for Input Offset Adaptation
Author :
Hafliger, Philipp ; Berge, H.K.O.
Author_Institution :
Dept. of Inf., Oslo Univ.
Abstract :
Gate leakage that occurs in deep-submicrometer CMOS might be a convenient new way of implementing highly resistive elements with minimal area consumption. We present an adaptive device that exploits gate leakage in the 90-nm STM CMOS process for offset cancellation at its input. This is achieved by a high-pass-filtering input stage with a very low cutoff due to a time constant of approximately 130 ms. In this filter, three 0.1times0.22 mum2 gate-oxide structures are used to achieve the equivalent of a 6.5-GOmega resistance
Keywords :
CMOS integrated circuits; filtering theory; high-pass filters; leakage currents; 6.5 Gohm; 90 nm; deep-submicrometer CMOS; gate leakage; gate-oxide structures; high-pass-filtering; input offset adaptation; CMOS process; Capacitance; Circuits; Filters; Gate leakage; Helium; Immune system; MOS capacitors; Tunneling; Voltage; Adaptation; deep submicrometer; gate leakage; offset cancellation;
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2006.886241
