DocumentCode :
1119877
Title :
Enlarging Instruction Streams
Author :
Desmet, L. ; Verbaeten, P. ; Joosen, Wouter ; Piessens, Frank
Author_Institution :
Katholieke Univ. Leuven, Leuven
Volume :
56
Issue :
10
fYear :
2007
Firstpage :
1342
Lastpage :
1357
Abstract :
Web applications are widely adopted and their correct functioning is mission critical for many businesses. At the same time, Web applications tend to be error prone and implementation vulnerabilities are readily and commonly exploited by attackers. The design of countermeasures that detect or prevent such vulnerabilities or protect against their exploitation is an important research challenge for the fields of software engineering and security engineering. In this paper, we focus on one specific type of implementation vulnerability, namely, broken dependencies on session data. This vulnerability can lead to a variety of erroneous behavior at runtime and can easily be triggered by a malicious user by applying attack techniques such as forceful browsing. This paper shows how to guarantee the absence of runtime errors due to broken dependencies on session data in Web applications. The proposed solution combines development-time program annotation, static verification, and runtime checking to provably protect against broken data dependencies. We have developed a prototype implementation of our approach, building on the JML annotation language and the existing static verification tool ESC/Java2, and we successfully applied our approach to a representative J2EE-based e-commerce application. We show that the annotation overhead is very small, that the performance of the fully automatic static verification is acceptable, and that the performance overhead of the runtime checking is limited.
Keywords :
Web services; programming languages; J2EE-based e-commerce application; JML annotation language; Web application vulnerabilities; provable protection; security engineering; session data dependencies; software engineering; Bandwidth; Clocks; Costs; Delay; Design optimization; Engines; Flow graphs; Hardware; Process design; Proposals; Superscalar processor design; access latency; branch prediction; code optimization; instruction fetch;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2007.70742
Filename :
4302707
Link To Document :
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