DocumentCode
1119968
Title
A set of analytic formulas for capacitance of VLSI interconnects of trapezium shape
Author
Samudra, GaneshShankar ; Hsio Lin Lee
Author_Institution
Dept. of Electr. Eng., Nat. Univ. of Singapore, Singapore
Volume
41
Issue
8
fYear
1994
fDate
8/1/1994 12:00:00 AM
Firstpage
1467
Lastpage
1469
Abstract
In VLSI timing analysis, a quick and accurate extraction of interconnect line to line and line to ground capacitance is very important. This paper presents a set of analytic formulas for the capacitance of one, two, and three trapezium interconnect lines over a ground plane which show better than 7% agreement with the capacitance values from the numerical simulation
Keywords
VLSI; capacitance; integrated circuit technology; VLSI timing analysis; analytic formulas; capacitance; ground plane; trapezium interconnect lines; trapezium shape; Capacitance; Clocks; Conductors; Geometry; Integrated circuit interconnections; Modems; Numerical simulation; Shape; Timing; Very large scale integration;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.297745
Filename
297745
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