• DocumentCode
    1120131
  • Title

    Very-shallow low-resistivity p+-n junctions for CMOS technology

  • Author

    Ling, E. ; Maguire, Paul D. ; Gamble, H.S. ; Armstrong, Brian M.

  • Author_Institution
    Queens University of Belfast, Belfast, N. Ireland
  • Volume
    8
  • Issue
    3
  • fYear
    1987
  • fDate
    3/1/1987 12:00:00 AM
  • Firstpage
    96
  • Lastpage
    97
  • Abstract
    Shallow p-n junctions 110 nm deep have been fabricated using rapid thermal diffusion from a spin-on oxide source. Surface concentrations greater than 3 × 1020cm-3are possible, with sheet resistivities less than 100 Ω/sq and a maximum reverse-bias leakage at 5 V of 3 nA.cm-2. Results from 150-nm junctions are also given and are compared with BF2ion implantation.
  • Keywords
    Chemical vapor deposition; Conductivity; Current density; Diodes; Etching; Implants; P-n junctions; Rapid thermal annealing; Temperature sensors; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/EDL.1987.26564
  • Filename
    1487114
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1120131