A buffered nondestructive-readout Josephson memory cell with three gates

The design and testing of a nondestructive readout memory cell with buffer gates to eliminate the half-select problem and to increase the operating margins are described. A 50 μm×52 μm cell has been fabricated using a Nb-AlO_x-Nb process with 2.5 μm line width and 3.75 μm junction size. The measured margins for data, read-enable, and sense lines are ±27%, ±17%, and ±48%, respectively. Variations of this buffer-gate memory design are also discussed