A proposed new structure for SEU immunity in SRAM employing drain resistance

A novel static random access memory (SRAM) cell is proposed (LRAM) in which resistors are used to delay ion-induced transients conventionally, and to divide down voltage transients at the information node. The voltage divider is a new concept in SEU hardening and has practical value for technologies where the voltage transient duration is significantly different for responses to ion strikes at p- and n-channel drains. In combination, the two pairs of resistors allow much reduced resistor values with the advantage of faster access times, better temperature stability, and better scalability. Advanced simulations in which transport and circuit effects are modeled simultaneously are used to project the viability of the LRAM concept and data from single-cell test structures and support the analysis.