DocumentCode :
1121988
Title :
Multilevel fixed-point-addition-based VLSI placement
Author :
Bo Hu ; Marek-Sadowska, M.
Author_Institution :
Flexlogics Inc., Santa Clara, CA, USA
Volume :
24
Issue :
8
fYear :
2005
Firstpage :
1188
Lastpage :
1203
Abstract :
A placement problem can be formulated as a quadratic program with nonlinear constraints. Those constraints make the problem hard. Omitting the constraints and solving the unconstrained problem results in a placement with substantial cell overlaps. To remove the overlaps, we introduce fixed points into the nonconstrained quadratic-programming formulation. Acting as pseudocells at fixed locations, they can be used to pull cells away from the dense regions to reduce overlapping. We present an in-depth study of the placement technique based on fixed-point addition and prove that fixed points are generalizations of constant additional forces used previously to eliminate cell overlaps. Experimental results on public-domain benchmarks show that the fixed-point-addition-based placer produces better results than the placer based on constant additional forces. We present an efficient multilevel placer based upon the fixed-point technique and demonstrate that it produces competitive results compared to the existing state-of-the-art placers.
Keywords :
VLSI; integrated circuit layout; quadratic programming; VLSI placement; force directed placement; multilevel fixed point addition; pseudocells; quadratic programming; Algorithm design and analysis; Crosstalk; Logic design; Quadratic programming; Silicon; Timing; Transistors; Very large scale integration; Wire; Force-directed placement; multilevel placement; quadratic placement;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2005.850802
Filename :
1487559
Link To Document :
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