DocumentCode
1122029
Title
Josephson LSI fabrication technology using NbN/MgO/NbN tunnel junctions
Author
Aoyagi, M. ; Nakagawa, H. ; Kurosawa, I. ; Takada, S.
Author_Institution
Electrotech. Lab., Ibaraki, Japan
Volume
27
Issue
2
fYear
1991
fDate
3/1/1991 12:00:00 AM
Firstpage
3180
Lastpage
3183
Abstract
Josephson LSI fabrication technology using NbN/MgO/NbN tunnel junctions has been developed. The deposition process of the NbN electrode was investigated to obtain high uniformity of the electrical properties. The deposition process of the MgO tunnel barrier was investigated to obtain high reproducibility of the Josephson critical current density. The NbN film with high T c of 15 K was obtained. The reproducibility of the MgO deposition rate was improved. The 10-b instruction 128-word ROM unit chip was successfully fabricated using the NbN/MgO/NbN junction LSI technology with the 3-μm design rule. The READ operation test was performed for a few 10-b words. The total access time was measured to be 710 ps. The uniformity and reproducibility of the critical current density in the LSI chip were improved
Keywords
integrated circuit technology; large scale integration; magnesium compounds; niobium compounds; read-only storage; superconducting memory circuits; 10 bit; 1280 bit; 15 K; 3 micron; 710 ps; Josephson LSI fabrication technology; Josephson junctions; LSI chip; MgO tunnel barrier; NbN-MgO-NbN; READ operation test; ROM chip; access time; critical current density; deposition process; reproducibility; uniformity; Critical current density; Electrodes; Fabrication; Large scale integration; Performance evaluation; Read only memory; Reproducibility of results; Semiconductor device measurement; Testing; Time measurement;
fLanguage
English
Journal_Title
Magnetics, IEEE Transactions on
Publisher
ieee
ISSN
0018-9464
Type
jour
DOI
10.1109/20.133887
Filename
133887
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