Title :
Towards a heterogeneous simulation kernel for system-level models: a SystemC kernel for synchronous data flow models
Author :
Patel, Hiren D. ; Shukla, Sandeep K.
Author_Institution :
Bradley Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
Abstract :
As SystemC gains popularity as a modeling language of choice for system-on-chip (SoC) designs, heterogeneous modeling in SystemC and efficient simulation become increasingly important. However, in the current reference implementation, all SystemC models are simulated through a nondeterministic discrete-event (DE) simulation kernel that schedules events at run time mimicking other models of computation (MoCs) using DE, which may get cumbersome. This sometimes results in too many delta cycles hindering the simulation performance of the model. SystemC also uses this simulation kernel as the target simulation engine. This makes it difficult to express different MoCs naturally in SystemC. In an SoC model, different components may need to be naturally expressible in different MoCs. These components may be amenable to static scheduling-based simulation or other presimulation optimization techniques. The goal is to create a simulation framework for heterogeneous SystemC models and to gain efficiency and ease of use within the framework of SystemC reference implementation. In this paper, a synchronous data flow (SDF) kernel extension for SystemC is introduced. Experimental results showing improvement in simulation time are also presented.
Keywords :
data flow computing; discrete event simulation; embedded systems; hardware description languages; hardware-software codesign; system-on-chip; SystemC kernel; embedded system design; heterogeneous simulation; modeling language; models of computation; nondeterministic discrete event simulation kernel; synchronous data flow models; system on chip designs; target simulation engine; Circuit simulation; Computational modeling; Discrete event simulation; Dynamic scheduling; Hardware design languages; Job shop scheduling; Kernel; Processor scheduling; Productivity; Very high speed integrated circuits; Embedded system design; SystemC; heterogeneous; models of computation; simulation efficiency; synchronous data flow;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2005.850819