DocumentCode :
1122549
Title :
A compact model of MOSFET mismatch for circuit design
Author :
Galup-Montoro, Carlos ; Schneider, Márcio C. ; Klimach, Hamilton ; Arnaud, Alfredo
Author_Institution :
Electr. Eng. Dept., Fed. Univ. of Santa Catarina, Florianopolis, Brazil
Volume :
40
Issue :
8
fYear :
2005
Firstpage :
1649
Lastpage :
1657
Abstract :
This paper presents a compact model for MOS transistor mismatch. The mismatch model uses the carrier number fluctuation theory to account for the effects of local doping fluctuations along with an accurate and compact dc MOSFET model. The resulting matching model is valid for any operation condition, from weak to strong inversion, from the linear to the saturation region, and allows the assessment of mismatch from process and geometric parameters. Experimental results from a set of transistors integrated on a 0.35 μm technology confirm the accuracy of our mismatch model under various bias conditions.
Keywords :
CMOS integrated circuits; MOSFET; network synthesis; semiconductor device models; 0.35 micron; MOS transistor mismatch model; MOSFET mismatch model; carrier number fluctuation theory; circuit design; compact dc MOSFET model; local doping fluctuations; semiconductor device models; Atomic layer deposition; Circuit synthesis; Digital circuits; Doping; Fluctuations; MOSFET circuits; Propagation delay; Semiconductor process modeling; Solid modeling; Threshold voltage; MOSFET; analog design; compact models; matching; mismatch;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2005.852045
Filename :
1487608
Link To Document :
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