A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique

Author

Okaniwa, Yusuke ; Tamura, Hirotaka ; Kibune, Masaya ; Yamazaki, Daisuke ; Cheung, Tsz-Shing ; Ogawa, Junji ; Tzartzanis, Nestoras ; Walker, William W. ; Kuroda, Tadahiro

Author_Institution

Dept. of Electron. & Electr. Eng., Keio Univ., Kanagawa, Japan

Volume

40

Issue

8

fYear

2005

Firstpage

1680

Lastpage

1687

Abstract

A differential comparator that can sample 40-Gb/s signals and that operates off a single 1.2-V supply was designed and fabricated in 0.11-μm standard CMOS technology. It consists of a front-end sampler, a regenerative stage, and a clocked amplifier to provide a small aperture time and a high toggle rate. The clocked amplifier employs a bandwidth modulation technique that switches the feedback gain to reduce the reset time while keeping the effective gain high. We confirmed that the comparator receives a 40-Gb/s data stream at a toggle rate of 10 GHz with bit error rate less than 10^-12 by laboratory measurements.

Keywords

CMOS digital integrated circuits; amplifiers; comparators (circuits); field effect MMIC; high-speed integrated circuits; modulators; 0.11 micron; 1.2 V; 10 GHz; 40 Gbit/s; CMOS clocked comparator; CMOS digital integrated circuits; bandwidth modulation technique; clocked amplifier; differential comparator; feedback gain; high-speed integrated circuits; Bandwidth; CMOS technology; Clocks; Costs; Educational technology; High speed integrated circuits; Inductors; Laboratories; Optical devices; Voltage; CMOS integrated circuits; comparators; high-speed integrated circuits;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2005.852014

Filename

1487612