A low-power CAM using pulsed NAND-NOR match-line and charge-recycling search-line driver

Author

Yang, Byung-Do ; Kim, Lee-Sup

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea

Volume

40

Issue

8

fYear

2005

Firstpage

1736

Lastpage

1744

Abstract

This paper proposes a low-power CAM using pulsed NAND-NOR match-line and charge-recycling search-line. The pulsed NAND-NOR match-line not only significantly reduces the match-line power by activating only a few match-lines by using NAND cells for several bits but also achieves high speed by using NOR cells for most bits. The charge-recycling search-line driver reduces the search-line power by recycling the charge of search-lines without precharging. The CAM chip with 128×32 bit is fabricated in a 0.25-μm CMOS process with 2.5 V. It dissipates 17.2 fJ/bit/search. It consumes 31% power of the dynamic NOR-type CAM.

Keywords

CMOS memory circuits; content-addressable storage; driver circuits; low-power electronics; memory architecture; 0.25 micron; 2.5 V; CAM chip; CMOS process; charge-recycling search-line driver; low-power CAM; match-line power; pulsed NAND-NOR match-line; search-line power; CADCAM; CMOS process; Circuits; Computer aided manufacturing; Energy consumption; Laser sintering; Multilevel systems; Recycling; Table lookup; Voltage; CAM; charge recycling; low power; match-line (ML); search-line (SL);

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2005.852028

Filename

1487618