High-frequency pattern generation using multiple input channels and combinational logic

A simple and high-performance approach is derived for combining multiple low-transition-rate digital test pattern channels to produce a single high-transition-rate one. Additional circuitry includes only delay elements and exclusive-or logic gates, so the speed is not limited by clocking constraints. Any cyclic output pattern with a period of p bits can be produced by appropriate programming of the input channels if the inputs are given patterns with a period of 2p bits