A Wide Locking-Range Frequency Divider for LMDS Applications

Author

Lin, Hong-Yu ; Hsu, Shawn S H ; Chan, Chih-Yuan ; Jin, Jun-De ; Lin, Yu-Syuan

Author_Institution

Nat. Tsinghua Univ., Hsinchu

Volume

54

Issue

9

fYear

2007

Firstpage

750

Lastpage

754

Abstract

A fully integrated frequency divider with an operation frequency up to 20 GHz is designed in 0.18-mum CMOS technology. The frequency divider includes two stages to divide the input signal by a factor of 4. A wide locking range from 18.8 to 23.2 GHz was obtained with a low phase noise of -134.8 dBc/Hz (1-MHz offset) at an output frequency of 4.7 GHz. The first stage is designed by an analog methodology with the varactors to extend the locking range, while the second stage is designed by a digital approach with the RF devices for a high operation frequency. With the advantages of both designs, this frequency divider is operated at the frequency range suitable for LMDS applications.

Keywords

CMOS integrated circuits; MMIC frequency convertors; frequency dividers; varactors; CMOS technology; LMDS applications; frequency 4.7 GHz; size 0.18 micron; varactors; wide locking-range frequency divider; CMOS technology; Circuits; Energy consumption; Frequency conversion; Frequency estimation; Inductors; Q factor; Radio frequency; Signal processing; TV broadcasting; Analog circuits; CMOS RF circuits; digital circuits; divider circuits;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2007.901258

Filename

4303325