Title :
High-speed interconnects with underlayer orthogonal metal grids
Author :
Wang, Pingshan ; Kan, Edwin Chih-Chuan
Author_Institution :
Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA
Abstract :
On-chip high-speed interconnects with underlayer orthogonal metal grids, including grid-backed lines (GBLs) and grid-backed coplanar waveguides (GBCPWs), are characterized through s-parameter measurements. For GBL test structures, the presence of underlayer metal grids reduces dispersion by a factor of 4 while the local speed of light decreases by a factor of 2 in comparison to those of conventional microstrip lines. The dispersion reduction comes from suppressing higher order modes; the local speed of light reduction comes from a longer current return path. These characteristics are beneficial for compact CMOS analog circuit designs. Losses caused by substrate and conductor lines are restrained by shielding the substrate and by involving weaker electric fields. Resonance at a frequency characterized by that of a patch antenna was observed and needs to be considered in high-speed circuit designs. The grids have weaker effects in the case of CPWs, where the side ground plate effects are significant. A signal transmission example shows that dispersion and frequency-dependent losses are important in determining the signal rise edge. Semi-empirical distributed resistance-inductance-capacitance-conductance (RLCG) equivalent circuit models are constructed for the interconnects below the resonant frequencies.
Keywords :
CMOS analogue integrated circuits; S-parameters; coplanar transmission lines; coplanar waveguides; high-speed integrated circuits; integrated circuit interconnections; integrated circuit modelling; microstrip lines; CMOS analog circuit designs; conductor lines; dispersion losses; electric fields; equivalent circuit models; frequency-dependent losses; grid-backed coplanar waveguides; grid-backed lines; high-speed circuit designs; high-speed integrated circuits; high-speed interconnects; integrated circuit modelling; light speed reduction; microstrip lines; patch antenna; resistance-inductance-capacitance-conductance models; resonant frequencies; s-parameter measurements; scattering parameters; shielding; signal transmission; substrate lines; transmission lines; underlayer orthogonal metal grids; Analog circuits; CMOS analog integrated circuits; Conductors; Coplanar waveguides; Integrated circuit interconnections; Microstrip; Resonance; Resonant frequency; Scattering parameters; Testing; High-speed integrated circuits; interconnections; modeling; scattering parameters; transmission lines;
Journal_Title :
Advanced Packaging, IEEE Transactions on
DOI :
10.1109/TADVP.2004.831833