ESD protection for SOI technology using under-the-BOX (substrate) diode structure

Author

Salman, Akram A. ; Pelella, Mario M. ; Beebe, Stephen G. ; Subba, Niraj

Author_Institution

Adv. Micro Devices Inc., Sunnyvale, CA

Volume

6

Issue

2

fYear

2006

fDate

6/1/2006 12:00:00 AM

Firstpage

292

Lastpage

299

Abstract

This paper presents a new integrated silicon-on-insulator (SOI) substrate-diode (SUBD) structure for an electrostatic-discharge (ESD) protection of the SOI I/O circuits. The diode is built under the buried oxide, within the substrate region of the SOI wafer, without additional steps to the conventional SOI CMOS process. This paper shows that the ESD protection level can reach four times the level of the standard SOI lateral-diode structure. This paper presents the device and process simulation results to demonstrate the effect of self-heating in both the standard SOI lateral and substrate diodes, and to demonstrate how to optimize the SUBD structure using a deep n-well implant

Keywords

buried layers; electrostatic discharge; integrated circuit reliability; semiconductor diodes; silicon-on-insulator; CMOS process; buried oxide; deep n-well implant; device simulation; electrostatic-discharge protection; integrated silicon-on-insulator circuits; process simulation; semiconductor reliability; substrate-diode structure; CMOS technology; Circuits; Electrostatic discharge; Implants; Protection; Semiconductor diodes; Silicon on insulator technology; Stress; Substrates; Thermal conductivity; Electrostatic discharge (ESD); semiconductor reliability; silicon-on-insulator (SOI);

fLanguage

English

Journal_Title

Device and Materials Reliability, IEEE Transactions on

Publisher

ieee

ISSN

1530-4388

Type

jour

DOI

10.1109/TDMR.2006.876587

Filename

1673723