Semihiding operators and active-edge specification

We introduce a new concurrence operator, called semihiding, for processing low-level digital circuit specifications by identifying their active edges. We define semihiding formally, study its algebraic properties, and overview several of its applications. We show that circuit modules can be mapped to a different timing convention at their interfaces while preserving their functionality (termed "interface recasting"), compliance to a certain timing convention can be verified regardless of functionality, and several families of asynchronous and synchronous circuits can be analyzed with reduced complexity on active-edge specifications obtained by semihiding. We present several validating experiments using a preliminary implementation of semihiding in an existing tool