The effects of annealing on the switching characteristics of an ion-implanted silicon MESFET

Author

Chattopadhyay, S.N. ; Pal, B.B.

Author_Institution

Dept. of Electron. Eng., Banaras Hindu Univ., Varanasi, India

Volume

36

Issue

5

fYear

1989

fDate

5/1/1989 12:00:00 AM

Firstpage

920

Lastpage

929

Abstract

The gate-source and gate-drain capacitances and the drain-source resistance are calculated in the region below pinchoff in the postimplanted annealed condition. It is observed that the capacitances decrease and the resistance increases compared to the case where diffusion of impurity ions due to annealing is not considered. P, B, As, Sb, Ga, and Al dopants are used for the calculation. The delay time is found to be mostly unaffected by annealing. The capacitances in the region above pinchoff show an increase as a result of annealing in the enhancement device compared to the case when diffusion is not taken into account. These capacitances are mainly due to the sidewalls of the space-charge region and are dependent on the threshold voltage, which decreases at higher anneal temperatures in the enhancement mode

Keywords

Schottky gate field effect transistors; annealing; capacitance; diffusion in solids; elemental semiconductors; ion implantation; silicon; MESFET; Si:Al; Si:As; Si:B; Si:Ga; Si:P; Si:Sb; annealing; delay time; drain-source resistance; enhancement device; gate source capacitance; gate-drain capacitances; impurity diffusion; ion implantation; pinchoff; postimplanted annealed condition; space-charge region; switching characteristics; threshold voltage; Annealing; Capacitance; Implants; Impurities; Lattices; MESFETs; Shape; Silicon; Temperature; Threshold voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.299674

Filename

299674