Title :
A Dynamic Quality-Adjustable H.264 Video Encoder for Power-Aware Video Applications
Author :
Chang, Hsiu-Cheng ; Chen, Jia-Wei ; Wu, Bing-Tsung ; Su, Ching-Lung ; Wang, Jinn-Shyan ; Guo, Jiun-In
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Chung-Cheng Univ., Chiayi, Taiwan
Abstract :
This paper proposes a dynamic quality-adjustable H.264 baseline profile (BP) video encoder that comprises 470 Kgates and 13.3 kB SRAM in a core size of 4.3 ?? 4.3 mm2 using TSMC 0.13 ??m 1P8M CMOS technology. Exploiting parameterized algorithms for motion estimation and intra prediction, the proposed design can dynamically configure the encoding modes with the design trade-off between power consumption and video quality for various video encoding applications. In addition, the proposed basic unit (BU)-based rate control hardware can maintain a constant and stable bit rate for network video transmission. It achieves real-time H.264 video encoding on CIF, D1, and HD720@30 frames/s with 7 mW to 25 mW, 27 mW to 162 mW, and 122 mW to 183 mW power dissipation in different quality modes.
Keywords :
CMOS integrated circuits; SRAM chips; motion estimation; video coding; CMOS technology; SRAM; TSMC; basic unit-based rate control hardware; dynamic quality-adjustable H.264 baseline profile; intra prediction; motion estimation; network video transmission; power 122 mW to 183 mW; power 27 mW to 162 mW; power 7 mW to 25 mW; power consumption; power dissipation; power-aware video application; size 0.13 mum; video encoder; video encoding; video quality; Baseline profile; H.264; HD720; quality-adjustable; video encoder;
Journal_Title :
Circuits and Systems for Video Technology, IEEE Transactions on
DOI :
10.1109/TCSVT.2009.2026958