DocumentCode
1128881
Title
A reconfiguration-based defect-tolerant design paradigm for nanotechnologies
Author
He, Chen ; Jacome, Margarida F. ; De Veciana, Gustavo
Author_Institution
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Volume
22
Issue
4
fYear
2005
Firstpage
316
Lastpage
326
Abstract
This article discusses a novel probabilistic design paradigm targeting reconfigurable architected nanofabrics and points to a promising foundation for comprehensively addressing, at the system level, the density, scalability, and reliability challenges of emerging nanotechnologies. The approach exposes a new class of yield, delay, and cost trade-offs that must be jointly considered when designing computing systems in defect-prone nanotechnologies.
Keywords
fault tolerance; logic design; logic gates; nanotechnology; reconfigurable architectures; redundancy; defect-tolerant probabilistic design; fault tolerance; molecular electronics; nanofabrics; nanotechnology; reconfigurable architecture; reliability; Costs; Delay; Design methodology; Fabrics; Fault tolerance; Helium; Iris; Nuclear magnetic resonance; Redundancy; Scalability; Nanotechnologies; defect tolerance; probabilistic design; reconfiguration;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2005.76
Filename
1492291
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