DocumentCode :
1129585
Title :
Graphical Analysis of a Digital Phase-Locked Loop
Author :
Russo, F.
Author_Institution :
University of Pisa
Issue :
1
fYear :
1979
Firstpage :
88
Lastpage :
94
Abstract :
Under the assumption of negligible quantization error effect and no noise, a nonuniform sampling first-order digital phase-locked loop (DPLL) is analyzed by a graphical method which displays limit cycles and the cycle slipping phenomenon. The analysis suggests an upper bound to the model gain and, consequently, to the pull-in range. Moreover, this method enables one to obtain a closed-form expression of the acquisition time, accurate enough for the cases of practical interest.
Keywords :
Closed-form solution; Displays; Frequency; Limit-cycles; Nonuniform sampling; Phase locked loops; Phase noise; Quantization; Sampling methods; Upper bound;
fLanguage :
English
Journal_Title :
Aerospace and Electronic Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9251
Type :
jour
DOI :
10.1109/TAES.1979.308799
Filename :
4102107
Link To Document :
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