DocumentCode
1130159
Title
Extraction and use of neural network models in automated synthesis of operational amplifiers
Author
Wolfe, Glenn ; Vemuri, Ranga
Author_Institution
Dept. of Electr. & Comput. Eng. & Comput. Sci., Cincinnati Univ., OH, USA
Volume
22
Issue
2
fYear
2003
Firstpage
198
Lastpage
212
Abstract
Fast and accurate performance estimation methods are essential to automated synthesis of analog circuits. Development of analog performance models is difficult due to the highly nonlinear nature of various analog performance parameters. This paper presents a neural network-based methodology for creating fast and efficient models for estimating the performance parameters of CMOS operational amplifier topologies. Effective methods for generation and use of the training data are proposed to enhance the accuracy of the neural models. The efficiency and accuracy of the resulting performance models are demonstrated via their use in a genetic algorithm-based circuit synthesis system. The genetic synthesis tool optimizes a fitness function based on user-specified performance constraints. The performance parameters of the synthesized circuits are validated by SPICE simulations and compared with those predicted by the neural network models. Experimental studies demonstrate that neural network modeling is an effective, fast, and accurate methodology for performance estimation.
Keywords
CMOS analogue integrated circuits; circuit CAD; genetic algorithms; integrated circuit design; neural nets; operational amplifiers; CMOS opamp topologies; SPICE simulations; analog ICs; analog circuits; automated synthesis; fitness function; genetic algorithm-based circuit synthesis system; genetic synthesis tool; neural network models; neural network-based methodology; performance estimation methods; performance parameters; user-specified performance constraints; Analog circuits; Circuit synthesis; Genetics; Network synthesis; Network topology; Neural networks; Operational amplifiers; Parameter estimation; Predictive models; Semiconductor device modeling;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2002.806600
Filename
1174095
Link To Document