DocumentCode
113016
Title
An Analytic Method for Capacitance Extraction of Asymmetric Vias
Author
Guangran Zhu ; Thiel, Werner ; Bracken, J. Eric
Author_Institution
ANSYS Inc., Canonsburg, PA, USA
Volume
25
Issue
5
fYear
2015
fDate
May-15
Firstpage
280
Lastpage
282
Abstract
This paper considers the problem of via-plane capacitance extraction for power and signal integrity analysis of printed circuit boards and electronic packages. The recently proposed full-wave method is extended to handle asymmetric antipads by judiciously selecting the integration domain of the magnetic field in the parallel-plate cavity. Numerical results demonstrate its agreement with the capacitance obtained from the quasi-static method.
Keywords
electronics packaging; printed circuits; vias; asymmetric antipads; asymmetric vias; capacitance extraction analytic method; electronic packages; full-wave method; magnetic field; parallel-plate cavity; power integrity analysis; printed circuit boards; quasistatic method; signal integrity analysis; via-plane capacitance extraction; Admittance; Capacitance; Cavity resonators; Equivalent circuits; Integrated circuit modeling; Ports (Computers); Printed circuits; Circuit simulation; parameter extraction; signal integrity;
fLanguage
English
Journal_Title
Microwave and Wireless Components Letters, IEEE
Publisher
ieee
ISSN
1531-1309
Type
jour
DOI
10.1109/LMWC.2015.2409795
Filename
7067456
Link To Document