Title :
Three-Dimensional Packaging for Power Semiconductor Devices and Modules
Author :
Calata, Jesus N. ; Bai, John G. ; Liu, Xingsheng ; Wen, Sihua ; Lu, Guo-Quan
Author_Institution :
Dept. of Mater. Sci. & Eng., State Univ., Blacksburg, VA, USA
Abstract :
Demands for increasing power density and levels of functional integration in switch-mode power converters require power electronics manufacturers to develop innovative packaging solutions for power semiconductor devices and modules. Three-dimensional (3-D) packaging techniques offer the potential of lower resistance, higher current handling capability, smaller volume, better thermal management capability, and high reliability. In this paper, we present the constructions and some electrical and thermomechanical analyses of four 3-D packaging approaches that have been developed within the Center for Power Electronics Systems—an NSF Engineering Research Center.
Keywords :
interconnections; power semiconductor devices; semiconductor device packaging; solders; thermal management (packaging); 3D packaging techniques; dimple-array interconnect; direct solder interconnect; electrical analysis; metal-posts-interconnected parallel-plate structure; power electronics; power semiconductor devices; semiconductor device packaging; semiconductor device reliability; stacked solder bumping; thermal management; thermomechanical analyses; Electronic packaging thermal management; Electronics packaging; Power electronics; Power semiconductor devices; Power semiconductor switches; Semiconductor device manufacture; Semiconductor device packaging; Switching converters; Thermal management; Thermal resistance; Dimple-array interconnect; direct solder interconnect; metal-posts-interconnected parallel-plate structure; packaging; power electronics; power semiconductor devices; stacked solder bumping; three-dimensional (3-D) packaging;
Journal_Title :
Advanced Packaging, IEEE Transactions on
DOI :
10.1109/TADVP.2005.852837
