Title :
Voltage shift in plastic-packaged bandgap references
Author :
Abesingha, Buddhika ; Rincón-Mora, Gabriel A. ; Briggs, David
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fDate :
10/1/2002 12:00:00 AM
Abstract :
Bandgap references, packaged in plastic, have been known to shift in voltage, a pre-package to post-package voltage variation. This package shift has been analytically discussed and experimentally investigated in this paper. The culprits for such a variation are the package-induced stresses present once the reference is encapsulated. Systematic voltage shifts can range from -3 to -7 mV, and is closely related to package type and processing. Major emphasis has been placed on reducing the random package-shift component, since systematic package shift can be trimmed and its temperature coefficient compensated. The package shift is seen to have a systematic positive temperature coefficient; its effects are mitigated as temperature increases. In summary, results of the study show that die-surface planarization techniques and mechanically elastic compliant layers between the die and the package reduce random as well as systematic package shifts. In particular, systematic variations improved from -5 to -2 mV (0.4% to 0.17% bandgap error) and three-sigma (3σ) variations improved from 8 to 4 mV (0.67% to 0.33% bandgap error) when adding a 15-μm mechanically compliant layer between the die and the package.
Keywords :
encapsulation; error compensation; integrated circuit packaging; internal stresses; planarisation; plastic packaging; reference circuits; 15 micron; compressive stresses; die-surface planarization techniques; mechanical stress; mechanically elastic compliant layers; package-induced stresses; plastic-packaged bandgap references; random package-shift component reduction; systematic package shift trimming; temperature coefficient compensation; voltage shift; Compressive stress; Internal stresses; Photonic band gap; Planarization; Plastic packaging; Silicon; Temperature; Thermal expansion; Thermal stresses; Voltage;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
DOI :
10.1109/TCSII.2002.806734