DocumentCode
1132526
Title
CMOS PLL calibration techniques
Author
Aktas, Adem ; Ismail, Mohammed
Author_Institution
Analog VLSI Lab., Ohio State Univ., USA
Volume
20
Issue
5
fYear
2004
Firstpage
6
Lastpage
11
Abstract
The article discusses auto calibration of phase lock loops (PLLs), particularly when used as frequency synthesizers in fully integrated radios targeting future generations of broadband wireless applications. These PLLs use wideband voltage-controlled oscillators (VCOs) covering a wide tuning range. A calibration technique is discussed and used in a wireless LAN radio.
Keywords
CMOS integrated circuits; calibration; phase locked loops; radio receivers; voltage-controlled oscillators; wireless LAN; CMOS; PLL calibration; WLAN; auto calibration; broadband wireless applications; frequency synthesizer; integrated radios; phase lock loops; voltage-controlled oscillators; wideband VCO; wireless LAN radio; CMOS technology; Calibration; Circuit optimization; Frequency synthesizers; Phase locked loops; Phase noise; Tuning; Voltage; Voltage-controlled oscillators; Wideband;
fLanguage
English
Journal_Title
Circuits and Devices Magazine, IEEE
Publisher
ieee
ISSN
8755-3996
Type
jour
DOI
10.1109/MCD.2004.1343243
Filename
1343243
Link To Document