ROMHD and ROMLD

An embedded read-only memory architecture with a complementary cell and two interchangeable power/performance design points is described. This article focuses on the novel features of 0.13-μm embedded, compilable read-only memory (ROM). A complementary array cell that increases and maintains signal margins across array sizes despite the ever-increasing capacitive coupling effects and lower voltages of each succeeding technology generation is described here along with a new architecture that allows a customer to switch between two different power/performance design points while only changing the metal wiring in the ROM via a compiler. Hardware data is presented that illustrates the success of the array design and the difference between the two power/performance design points.