A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5–6 GHz CMOS LNA

The increasing mask costs of modern scaled CMOS makes silicon area precious. Meanwhile, the lowering oxide thickness seriously toughens ESD protection of RF circuits, pushing towards area-demanding inductor-based ESD protection techniques. This paper presents a transformer-based ESD protection technique for inductor-based LNAs. With no area penalty, an ESD protection level of 4.5 kV HBM is achieved. Introducing two-stage protection increases the robustness up to 7.3 kV, maintaining excellent RF performance. Further it extends the TLP protection level from 3.2 to 5 A. A noise figure of 2.6 dB is achieved with a power gain of 14.8 dB, while consuming 6.5 mW. The technique serves as a solution for low-area highly protected LNAs in deep-submicron CMOS.