DocumentCode :
1132804
Title :
Design and Measurement of a CT \\Delta \\Sigma ADC With Switched-Capacitor Switched-Resistor Feedback
Author :
Anderson, Martin ; Sundström, Lars
Author_Institution :
Dept. for Electr. & Inf. Technol. (EIT), Lund Univ., Lund
Volume :
44
Issue :
2
fYear :
2009
Firstpage :
473
Lastpage :
483
Abstract :
The performance of traditional continuous-time (CT) delta-sigma (DeltaSigma) analog-to-digital converters (ADCs) is limited by their large sensitivity to feedback pulse-width variations caused by clock jitter in their feedback digital-to-analog converters (DACs). To mitigate that effect, we propose a modified switched-capacitor (SC) feedback DAC technique, with a variable switched series resistor (SR). The architecture has the additional benefit of reducing the typically high SC DAC output peak currents, resulting in reduced slew-rate requirements for the loop-filter integrators. A theoretical investigation is carried out which provides new insight into the synthesis of switched-capacitor with switched series resistor (SCSR) DACs with a specified reduction of the pulse-width jitter sensitivity and minimal power consumption and complexity. To demonstrate the concept and to verify the reduced pulse-width jitter sensitivity a 5 mW, 312 MHz, second order, low-pass, 1-bit, CT DeltaSigma modulator with SCSR feedback was implemented in a 1.2 V, 90 nm, RF-CMOS process. An SNR of 66.4 dB and an SNDR of 62.4 dB were measured in a 1.92 MHz bandwidth. The sensitivity to wideband clock phase noise was reduced by 30 dB compared to a traditional switched-current (SI) return-to-zero (RZ) DAC.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; capacitors; delta-sigma modulation; digital-analogue conversion; resistors; CT DeltaSigma ADC; RF-CMOS process; analog-to-digital converters; bandwidth 1.92 MHz; clock jitter; delta-sigma modulators; digital-to-analog converters; frequency 312 MHz; minimal power consumption; pulse-width jitter sensitivity; pulse-width variations; size 90 nm; switched-capacitor feedback; switched-current return-to-zero; variable switched series resistor; voltage 1.2 V; Analog-digital conversion; Clocks; Computed tomography; Digital-analog conversion; Feedback; Jitter; Pulse width modulation converters; Resistors; Space vector pulse width modulation; Strontium; A/D conversion; clock jitter; delta-sigma modulation;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2008.2010978
Filename :
4768889
Link To Document :
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