DocumentCode :
1132988
Title :
A Numerical Expansion Technique and Its Application to Minimal Multiplexer Logic Circuits
Author :
Tabloski, Theodore F. ; Mowle, Frederic J.
Author_Institution :
Bell Laboratories
Issue :
7
fYear :
1976
fDate :
7/1/1976 12:00:00 AM
Firstpage :
684
Lastpage :
702
Abstract :
A method of realizing arbitrary combinational switching functions with multiplexers is derived. These circuits are divided in two classes where the first allows only uncomplemented variables as control inputs and the second has unrestricted inputs. The selected inputs to each multiplexer in the first class of circuits (tree circuits) are shown to be residue functions of the output function. Using this fact, it is demonstrated that many functional properties simplify realization procedures.
Keywords :
Implicitly exhaustive search, logic design automation, minimization algorithm, modular logic arrays, multiplexer, multiplexer universal logic module (MULM), numerical technique, Shannon´s expansion, universal logic module (ULM).; Circuit synthesis; Design automation; Integrated circuit interconnections; Logic arrays; Logic circuits; Logic design; Logic devices; Multiplexing; Pins; Switching circuits; Implicitly exhaustive search, logic design automation, minimization algorithm, modular logic arrays, multiplexer, multiplexer universal logic module (MULM), numerical technique, Shannon´s expansion, universal logic module (ULM).;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1976.1674678
Filename :
1674678
Link To Document :
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