• DocumentCode
    1133215
  • Title

    An offset-canceling low-noise lock-in architecture for capacitive sensing

  • Author

    Tavakoli, Maziar ; Sarpeshkar, Rahul

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA
  • Volume
    38
  • Issue
    2
  • fYear
    2003
  • fDate
    2/1/2003 12:00:00 AM
  • Firstpage
    244
  • Lastpage
    253
  • Abstract
    We describe an offset-canceling low-noise lock-in architecture for capacitive sensing. We take advantage of the properties of modulation and demodulation to separate the signal from the DC offset and use nonlinear multiplicative feedback to cancel the offset. The feedback also attenuates out-of-band noise and further enhances the power of a lock-in technique. Experimentally, in a 1.5-μm BiCMOS chip, a fabrication DC offset of 2 mV and an intentional offset of 100 mV were attenuated to 9 μV. Our offset-canceling technique could also be useful for practical multipliers that need tolerance to fabrication errors. We present a detailed theoretical noise analysis of our architecture that is confirmed by experiment. As an example application, we demonstrate the use of our architecture in a simple capacitive surface-microelectromechanical-system vibration sensor where the performance is limited by mechanical Brownian noise. However, we show that our electronics limits us to 30 μg/√Hz, which is at least six times lower than the noise floor of commercial state-of-the-art surface-micromachined inertial sensors. Our architecture could, thus, be useful in high-performance inertial sensors with low mechanical noise. In a 1-100-Hz bandwidth, our electronic detection threshold corresponds to a one-part-per-eight-million change in capacitance.
  • Keywords
    BiCMOS analogue integrated circuits; accelerometers; analogue multipliers; analogue processing circuits; capacitive sensors; circuit feedback; compensation; integrated circuit noise; microsensors; random noise; vibration measurement; 1 to 100 Hz; 1.5 micron; 100 Hz; BiCMOS chip; DC offset; accelerometer; analog multiplier; capacitive MEMS sensor; capacitive sensing; capacitive vibration sensor; demodulation; electronic detection threshold; inertial sensors; low-noise lock-in architecture; mechanical Brownian noise; modulation; noise analysis; nonlinear multiplicative feedback; offset compensation; offset-canceling lock-in architecture; out-of-band noise attenuation; surface-micromachined sensors; Bandwidth; BiCMOS integrated circuits; Capacitance; Capacitive sensors; Demodulation; Fabrication; Feedback; Mechanical sensors; Noise cancellation; Vibrations;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2002.807173
  • Filename
    1175505