Independent Double-Gate Fin SONOS Flash Memory Fabricated With Sidewall Spacer Patterning

Author

Yun, Jang-Gn ; Kim, Yoon ; Park, Il Han ; Lee, Jung Hoon ; Kang, Daewoong ; Lee, Myoungrack ; Shin, Hyungcheol ; Lee, Jong Duk ; Park, Byung-Gook

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea

Volume

56

Issue

8

fYear

2009

Firstpage

1721

Lastpage

1728

Abstract

Fin silicon-oxide-nitride-oxide-semiconductor (SONOS) flash memories having independent double gates are fabricated and characterized. This device has two sidewall gates sharing one Si fin. To achieve narrow Si fin width over the photolithography limitation, sidewall spacer patterning is adopted. Specific fabrication processes for the fin SONOS flash memory having independent double gates are described. Electrical properties related to the opposite gate dependence are characterized. Measurement results of the paired cell interference are delivered.

Keywords

electric properties; flash memories; logic gates; photolithography; electrical properties; fabrication processes; fin silicon-oxide-nitride-oxide-semiconductor flash memories; independent double gates; photolithography; sidewall gates; sidewall spacer patterning; Companies; Computer science; Fabrication; Flash memory; High K dielectric materials; Interference; Lithography; Nonvolatile memory; SONOS devices; Student members; Fin silicon–oxide–nitride–oxide–semiconductor (SONOS) Flash memory; interference coupling; paired cell interference (PCI); separated double gates; sidewall spacer patterning;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2009.2024228

Filename

5164932