Automatic VT extractors based on an n×n2 MOS transistor array and their application

The development of incremental and decremental V_T extractors based on the square-law characteristic and an n ×n² transistor array is described. Different implementations have been discussed and the effect of nonidealities such as mobility reduction, channel-length modulation, mismatch, and body effect has been analyzed. Besides automatic V_T extraction, parameter K of an MOS transistor can also be extracted automatically using the V_T extractor, without any need of calculation and delay, and the extracted V_T and K are, respectively, in voltage and current. Experimental results are presented and indicate that the differences between extracted values using the V_T extractor and the most popular numerical method are as small as 0.15% and 0.064%. Additional applications, such as in level shifting, temperature compensation, and temperature measurement, where the V_T extractor can be used either as a PTAT sensor or as a centigrade sensor, are presented