Title :
A fast implementation algorithm and a bit-serial realization method for grayscale morphological opening and closing
Author :
Ko, Sung-Jea ; Morales, Aldo ; Lee, Kyung-Hoon
Author_Institution :
Dept. of Electron. Eng., Korea Univ., Seoul, South Korea
fDate :
12/1/1995 12:00:00 AM
Abstract :
This paper presents a fast real-time software implementation method for the grayscale morphological function processing (FP) opening and closing. The proposed method utilizes a basis matrix composed of structuring elements. It is shown that opening and closing can be accomplished by a local matrix operation in real time rather than the cascade operation (erosion/dilation followed by dilation/erosion), which requires large amount of delays and memory storage for the intermediate erosion/dilation outputs. A bit-serial implementation architecture for the grayscale morphological FP operators is presented. The proposed implementation architecture employs a bit-serial approach that allows grayscale morphological operations to be decomposed into bit-level binary operation units for the p-b grayscale signal. It is shown that this realization is simple and modular in structure and thus is suitable for VLSI implementations
Keywords :
VLSI; image processing; mathematical morphology; matrix algebra; real-time systems; software packages; VLSI implementations; basis matrix; bit-level binary operation units; bit-serial implementation architecture; bit-serial realization method; fast implementation algorithm; fast real-time software implementation method; grayscale morphological closing; grayscale morphological function processing; grayscale morphological opening; grayscale signal; local matrix operation; modular structure; structuring elements; Computer vision; Delay effects; Gray-scale; Image texture analysis; Morphological operations; Morphology; Power engineering and energy; Software algorithms; Symmetric matrices; Very large scale integration;
Journal_Title :
Signal Processing, IEEE Transactions on