DocumentCode
1134446
Title
A Clocked Multivalued Flip-Flop
Author
Sintonen, Leo
Author_Institution
Department of Electronics, Tampere University of Technology
Issue
3
fYear
1977
fDate
3/1/1977 12:00:00 AM
Firstpage
292
Lastpage
294
Abstract
A multivalued flip-flop is presented. The implementation of the flip-flop is independent of N (number of logic levels). The output of the flip-flop is stable during clock transitions. Techniques in the design of sequential circuits using this type of multivalued flip-flops are presented.
Keywords
N-valued logic design, N-valued logic devices, N-state flip-flop, multivalued flip-flop, multivalued sequential circuits.; Artificial intelligence; Clocks; Computer displays; Data analysis; Data structures; Flip-flops; Gravity; Iris; Logic devices; Sequential circuits; N-valued logic design, N-valued logic devices, N-state flip-flop, multivalued flip-flop, multivalued sequential circuits.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1977.1674823
Filename
1674823
Link To Document