DocumentCode
1134777
Title
ULM Implicants for Minimization of Univers Logic Module Circuits
Author
Voith, Raymond P.
Author_Institution
University of Toledo
Issue
5
fYear
1977
fDate
5/1/1977 12:00:00 AM
Firstpage
417
Lastpage
424
Abstract
In this paper a method is developed for circuit minimization using the universal logic modules (ULM´s) of Yau and Tang. This objective is obtained by using an extension of prime implicants termed ULM implicants. Each ULM implicant implies one possible saving of a module in the tree structure implementing a function. The method is developed for the ULM(l) and an extension to the higher order ULM(p) is discussed.
Keywords
Boolean algebra, integrated circuits, logic circuits, logic design, multiplexers, optimization, prime implicants, universal functions.; Algebra; Boolean functions; Design optimization; Integrated circuit yield; Logic circuits; Logic design; Logic functions; Minimization methods; Multiplexing; Tree data structures; Boolean algebra, integrated circuits, logic circuits, logic design, multiplexers, optimization, prime implicants, universal functions.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1977.1674858
Filename
1674858
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