Vertical-Si-Nanowire SONOS Memory for Ultrahigh-Density Application

Author

Chen, Mingcong ; Yu, Hong Yu ; Singh, Navab ; Sun, Yuan ; Shen, Nan Sheng ; Yuan, Xiaohong ; Lo, Guo-Qiang ; Kwong, Dim-Lee

Author_Institution

Inst. of Microelectron., A* STAR, Singapore, Singapore

Volume

30

Issue

8

fYear

2009

Firstpage

879

Lastpage

881

Abstract

In this letter, we present the fabrication and characteristics of a gate-all-around SONOS Flash memory using a vertical Si nanowire (SiNW), which is proposed to be the key building block to realize the 3-D multilevel memory technology for ultrahigh-density application. A highly scaled SiNW with a diameter down to 50 nm using CMOS-compatible technology was achieved. Using an unoptimized SONOS gate stack (with the thickness of SiO₂/Si₃N₄/SiO₂ ~ 5/5/6 nm), the devices exhibit well-behaved memory characteristics, in terms of program/erase window, retention, and endurance properties.

Keywords

CMOS memory circuits; flash memories; nanowires; 3D multilevel memory technology; CMOS-compatible technology; SONOS gate stack; gate-all-around SONOS Flash memory; highly scaled SiNW; ultrahigh-density application; vertical Si nanowire; vertical-Si-nanowire SONOS memory; well-behaved memory characteristics; 3-D Flash memory; Gate all around (GAA); vertical silicon nanowire (SiNW);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2009.2024442

Filename

5165094