• DocumentCode
    1135699
  • Title

    Track Routing and Optimization for Yield

  • Author

    Cho, Minsik ; Xiang, Hua ; Puri, Ruchir ; Pan, David Z.

  • Author_Institution
    Univ. of Texas, Austin
  • Volume
    27
  • Issue
    5
  • fYear
    2008
  • fDate
    5/1/2008 12:00:00 AM
  • Firstpage
    872
  • Lastpage
    882
  • Abstract
    In this paper, we propose track routing and optimization for yield (TROY), the first track router for the optimization of yield loss due to random defects. As the probability of failure (POF), which is an integral of the critical area and the defect size distribution, strongly depends on wire ordering, sizing, and spacing, track routing can play a key role in effective wire planning for yield optimization. However, a straightforward formulation of yield-driven track routing can be shown to be integer nonlinear programming, which is a nondeterministic polynomial-time complete problem. TROY overcomes the computational complexity by combining two effective techniques, i.e., the minimum Hamiltonian path (MHP) from graph theory and the second-order cone programming (SOCP) from mathematical optimization. First, TROY performs wire ordering to minimize the critical area for short defects by finding an MHP. Then, TROY carries out optimal wire sizing/spacing through SOCP optimization based on the given wire order. Since the SOCP can be optimally solved in near linear time, TROY efficiently achieves globally optimal wire sizing/spacing for the minimal POF.
  • Keywords
    circuit optimisation; graph theory; integer programming; network routing; nonlinear programming; probability; random processes; graph theory; integer nonlinear programming; mathematical optimization; minimum Hamiltonian path; nondeterministic polynomial-time complete problem; probability of failure; random defect; second-order cone programming; track routing; yield optimization; Computational complexity; Fabrication; Graph theory; Mathematical programming; Polynomials; Production facilities; Routing; Very large scale integration; Wire; Yield estimation; Minimum Hamiltonian path (MHP); physical design; random defects; second-order cone programming (SOCP); track routing; yield;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2008.917589
  • Filename
    4492828