DocumentCode
1136143
Title
Scheduling methodology for conditional execution of kernels onto multicontext reconfigurable architectures
Author
Rivera, F. ; Sanchez-Elez, M. ; Hermida, R. ; Bagherzad, N.
Author_Institution
Dept. Arquitectura de Comput. y Autom., Univ. Complutense de Madrid, Madrid
Volume
2
Issue
3
fYear
2008
fDate
5/1/2008 12:00:00 AM
Firstpage
199
Lastpage
213
Abstract
The authors present a scheduling methodology for conditional execution of kernels onto single instruction stream/multiple data stream multicontext reconfigurable architectures. Data flow graphs are used to describe the target applications in which some kernels are conditionally executed depending on runtime conditions. Immediately after testing a condition the next kernel to be processed is known and its configurations and input data can be loaded, producing a computation stall while these transfers are performed. A compilation-time kernel scheduling is proposed to handle conditional branches (CBs) by determining a kernel sequence that minimises these computation stalls reducing the application latency. Target applications are firstly partitioned taking into account the presence of CBs, and then kernels are ordered for execution and mapped onto the reconfigurable system. Experimental results obtained for interactive and synthetic applications demonstrate the effectiveness of the proposal.
Keywords
data flow graphs; program compilers; reconfigurable architectures; scheduling; compilation-time kernel scheduling; conditional branch; data flow graphs; kernel conditional execution; single instruction stream/multiple data stream multicontext reconfigurable architecture;
fLanguage
English
Journal_Title
Computers & Digital Techniques, IET
Publisher
iet
ISSN
1751-8601
Type
jour
DOI
10.1049/iet-cdt:20070085
Filename
4492952
Link To Document