DocumentCode
1136185
Title
An Efficient Fault Diagnosis Algorithm for Symmetric Multiple Processor Architectures
Author
Meyer, Gerard G L ; Masson, Gerald M.
Author_Institution
Department of Electrical Engineering, The Johns Hopkins University
Issue
11
fYear
1978
Firstpage
1059
Lastpage
1063
Abstract
A new diagnosis algorithm for determining the existing fault situation in a symmetric multiple processor architecture is given. The algorithm assumes that there are n processors, each of which is tested by at least t other processors, and at most t of which are faulty. The existing fault situation is always diagnosed if n ≥ 2t + 1 and, in some cases, can still be diagnosed if n < 2t + 1. The implementation of the algorithm is straightforward and suitable for microprocessor applications.
Keywords
Diagnosis algorithm; fault syndromes; microprocessor; modular networks; Automation; Circuits; Computer architecture; Contracts; Diodes; Fault diagnosis; Linear algebra; Logic arrays; Multivalued logic; Testing; Diagnosis algorithm; fault syndromes; microprocessor; modular networks;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1978.1674996
Filename
1674996
Link To Document