Asynchronous VLSI neural networks using pulse-stream arithmetic

Author

Murray, Alan F. ; Smith, Anthony V.W.

Author_Institution

Dept. of Electr. Eng., Edinburgh Univ., UK

Volume

23

Issue

3

fYear

1988

fDate

6/1/1988 12:00:00 AM

Firstpage

688

Lastpage

697

Abstract

The relationship between neural networks and VLSI is explored. An introduction to neural networks relates the Hopfield model and the Delta learning rule to S. Grossberg´s (1968) description of neural dynamics. A computational style that mimics that of a biological neural network, using pulse-stream signaling and analog summation, is described. Digitally programmable weights allow learning networks to be constructed. Functional and structural forms of neural and synaptic functions are presented, along with simulation results. Finally a neural network implemented in 3-μm CMOS is presented with preliminary measurements

Keywords

CMOS integrated circuits; VLSI; digital integrated circuits; neural nets; parallel architectures; 3 micron; CMOS; Delta learning rule; Hopfield model; VLSI neural networks; analog summation; asynchronous networks; computational style; learning networks; neural dynamics; preliminary measurements; pulse-stream arithmetic; pulse-stream signaling; simulation results; structural forms; synaptic functions; Analog computers; Arithmetic; Biological neural networks; Biological system modeling; Biology computing; Computational modeling; Computer networks; Hopfield neural networks; Neural networks; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.307

Filename

307