Title :
Dynamic instruction scheduling and the Astronautics ZS-1
Author_Institution :
Astronaut. Corp. of America, Madison, WI, USA
fDate :
7/1/1989 12:00:00 AM
Abstract :
An overview of and survey solutions to the problem of instruction scheduling for pipelined computers are provided. The author demonstrated that dynamic instruction scheduling can provide performance improvements not possible with static scheduling alone. He describes a high-performance computer, the Astronautics ZS-1, which uses novel methods for implementing dynamic scheduling and which can outperform computers using similar-speed technologies that rely solely on state-of-the-art static scheduling techniques.<>
Keywords :
instruction sets; pipeline processing; scheduling; Astronautics ZS-1; dynamic instruction scheduling; high-performance computer; instruction scheduling; performance improvements; pipelined computers; Computer aided instruction; Dynamic scheduling; Hardware; High performance computing; Pipeline processing; Processor scheduling; Reduced instruction set computing; Registers; Runtime; Supercomputers;
