Title :
Coding for Random-Access Memories
Author_Institution :
Raytheon Company
fDate :
6/1/1978 12:00:00 AM
Abstract :
A new decoding technique is presented for correcting errors due to bit-oriented hardware failures in parallel, random-access memories. It is shown that the resulting decoder compares favorably, both in complexity and in decoding delay, with currently implemented bit-switching techniques used for the same purpose.
Keywords :
Bit switching; erasure correction; error-correcting codes; random-access memories; syndrome decoding; Decoding; Delay; Error correction; Error correction codes; Hamming distance; Hardware; Random access memory; Read-write memory; Switches; Bit switching; erasure correction; error-correcting codes; random-access memories; syndrome decoding;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1978.1675143
