DocumentCode :
1138038
Title :
A low power, wide dynamic range multigain signal processor for the SNAP CCD
Author :
Walder, J.P. ; Chao, G. ; Genat, J.F. ; Karcher, A. ; Krieger, B. ; Kurz, S. ; Steckert, J. ; von der Lippe, H.
Author_Institution :
Lawrence Berkeley Nat. Lab., CA, USA
Volume :
51
Issue :
5
fYear :
2004
Firstpage :
1936
Lastpage :
1941
Abstract :
A four-channel custom chip designed for reading out the CCDs of the proposed SNAP satellite visible imager is presented. Each channel consists of a single-ended to differential converter followed by a correlated double sampler and a novel multislope integrator. The output signal is differentially brought out of the chip by an output buffer. This circuit is designed to operate at room temperature for test purpose and at 140 K, which will be the operating temperature. The readout speed is 100 kHz. The 16-bit dynamic range is covered using 3 gains each with a 12-bit signal to noise ratio. The prototype chip, implemented in a 0.25 μm CMOS technology, has a measured readout noise of 7 μV rms at 100 kHz readout speed, a measured nonlinearity of ±0.0025% and a power consumption of 6.5 mW, with a 3.3 V supply voltage.
Keywords :
CMOS analogue integrated circuits; analogue processing circuits; astronomical instruments; charge-coupled devices; nuclear electronics; position sensitive particle detectors; semiconductor counters; signal processing; 12-bit signal to noise ratio; 140 K; 16-bit dynamic range; 3.3 V; 6.5 mW; CCD; CMOS analog integrated circuits; CMOS technology; SNAP satellite visible imager; Super Nova Acceleration Probe project; analog processing circuits; charge coupled devices; correlated double sampler; differential converter; four-channel custom chip; multislope integrator; output buffer; output signal; power consumption; prototype chip; readout noise; readout speed; room temperature; CMOS technology; Charge coupled devices; Circuit testing; Dynamic range; Noise measurement; Power measurement; Semiconductor device measurement; Signal processing; Temperature; Velocity measurement; Analog processing circuits; CMOS analog integrated circuits; charge coupled devices; correlated double sampling;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2004.834717
Filename :
1344264
Link To Document :
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