DocumentCode :
1138995
Title :
Diagnosing Single Faults in Fanout-Free Combinational Circuits
Author :
Markowsky, George
Author_Institution :
Department of Computer Sciences, IBM T. J. Watson Research Center
Issue :
11
fYear :
1979
Firstpage :
863
Lastpage :
864
Abstract :
We show how to construct, in a simple manner, a test set having n + 1 tests for a fanout-free combinational circuit with n primary inputs which distinguishes (diagnoses) nonequivalent single faults. This result is an improvement over the upper bound in [1, Theorem 3.9] of n + g (g is the number of primary input gates) and the upper bound in [3, Theorem 4], [5] of 2n for the least number of tests required to distinguish among nonequivalent single faults.
Keywords :
Algorithm; diagnosing single faults; fanout-free combinatorial circuits; stuck line fault; test set; Boolean functions; Circuit faults; Circuit testing; Combinational circuits; Upper bound; Algorithm; diagnosing single faults; fanout-free combinatorial circuits; stuck line fault; test set;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1979.1675266
Filename :
1675266
Link To Document :
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